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Question Paper Code : 31298
B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2013.
Third Semester
Computer Science and Engineering
CS2202/CS 34/EC 1206 A/10144 CS 303/080230012--DIGITAL PRINCIPLES AND SYSTEM DESIGN
(Common to Information Technology)
(Regulation 2008/2010)
(Common to PTCS 2202 - Digital Principles and System Design for B.E. (Part-Time) Second Semester - CSE - Regulation 2009)
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ANNA UNIVERSITY SYLLABUS: CLICK HERE
PART A (10 x 2 = 20 marks)
1. Convert (1001010.1101001)2 to base 16 and (23 1.07)8 to base 10.
2. Realize XOR gate using only 4 NAND gates.
3. Implement F = XY’ Z + Y’ Z’+X’ Z using AOl logic.
4. Obtain the truth table for BCD to Excess-3 code converter.
5. Draw the truth table and circuit thagram of 4 to 2 encoder.
6. Distinguish EEPROM and flash memory.
7. Realize a JK ffip-flop using D ffip-flop be and gates.
8. Write the HDL code for up-down counter using behavioural model.
9. Distinguish fundamental mode circuit and pulse mode circuit.
10. Define primitive flow table.
PART B — (5 x 16 = 80 marks)
11. (a) Simplify the following Boolean function using Quine-McClusky method F = (A, B, C,
D, E)= Σm (0, 1, 3, 7, 13, 14, 21, 26, 8)+ Σd (2, 5, 9, 11, 17, 24). (16)
Or
(b) (i) Simplify the given Boolean function in POS form using K-map and draw the logic diagram using only NOR gates.
F(A, B, C,D)= Σm (0,1, 4,7,8,10,12, 15)+ Σd (2, 6,11,14). (10)
(ii) Convert 78.510 into binary. (3)
(iii) Find the dual and complement of the following Boolean expression.
xyz’+x’yz+z(xy+w). (3).
12. (a) Design a combinational circuit to perform BCD addition. (16)
Or
(b) (i) Design a - —4-bit- —-magnitude comparator with three outputs:
A>B,A=B&A(ii) Construct a 4-bit odd parity generator circuit using gates. (4)
13. (a) (1) Realize 4 x 16 decoder using two 3 x 8 decoders with enable input. (4)
(ii) Implement the two following Boolean functions using 8 x 2 PROM.
Fl = Σm (3, 5, 6, 7) and F2 = Σm (1, 2, 3, 4). (6)
(iii) Implement the following function using a multiplexer.
F(W, X, Y, Z)= Σm (0, 1, 3, 4, 8, 9, 15). (6)
Or
(b) Implement the following two Boolean functions using PLA with 3 inputs, 4 product terms and 2 outputs.
Fl = Σm (3, 5,6, 7) and F2 = Σm (1, 2, 3, 4). (16)
14. (a) Design a synchronous counter with the following sequence: 0,1,3,7,6,4 and repeats. Use JK ffip-flops. (16)
(b) Design the sequential circuit specified by the following state diagram using T ffip-flops (16)
15. (a) (i) What is the objective of state assignment in asynchronous circuit? Explain race free state assignment with an example (8)
(ii) Discuss about static, dynamic and essential hazards in asynchronous sequential circuits. (8)
Or
(b) Design an asynchronous sequential circuit with inputs xl and x2 and one output z. Initially and at any time if both the inputs are 0, output is equal to 0. When xl or x2 becomes 1, z becomes 1. When second input also becomes 1, z = 0; The output stays at 0 until circuit goes back to initial state. . . (16)
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