10CS33 Logic Design VTU 3th Semester Question Bank

Leave a Comment
Sponsored Ads:
Sponsored Ads:
Visvesvaraya Technological University - VTU
Question Bank
B.E./B.Tech. DEGREE EXAMINATION
(Regulation/Scheme 2010)
10CS33 Logic Design
Third Semester - 3th
Computer Science Engineering - CSE
(Common to Information Science Engineering)

University Papers | Syllabus | Entrance Exam | Govt & PSU Papers | Bank Papers

Programming Questions | Travel Tips | Mobile Review | Placement Papers | Books

VTU SYLLABUS: CLICK HERE

OTHER DEPARTMENT PAPERS: CLICK HERE

Download PDF File - Click Here




For More Question paper of CSE - CLICK HERE

For more question paper of ISE - CLICK HERE


10CS33:LOGIG DESIGN
Question Bank:
Unit 1: Digital Principles and Applications

1. Explain analog and digital signals with examples.
2. Define Period, frequency, Switching time and Duty cycle.
3. Explain the circuit model and operation of the buffer, tri-state buffer, the inverter and the Tristate
inverter.
4. Explain standard TTL.
5. Explain the loading rules.
Unit 1: Digital Logic
1. Explain the logic circuit and truth table of the Inverter, OR gat and AND
gate
2. Why NAND & NOR gates are called universal gates.
3. Differentiate between positive and negative logic.
4. Convert NAND gate into Inverter, in two different ways.
5. What are universal gates? Implement the following function
using universal gates ((A+B)C)”)D
6. Implement AB+C” D” with only three NAND gates. Draw logic
diagram also. Assume the inverted input is available.
7. What is assertion level logic?
8. Explain Expander with an example.

Unit 2: Combinational Logic Circuit

1. Minimize the following using K-maps:
i)SOP expression given by f(A,B,C,D) = m(0,1,2,3,5,9,14,15) +
(4,8,11,12)
ii)POS expression given by f(A,B,C,D) = M(0,1,2,5,8,9,10)
2. Implement the minimal expressions thus obtained using
basic gates(both normal and inverted inputs can be used)
3. List out the difference between combinational and sequential logic
circuits.
4. Demonstrate by means of Truth table the validity of following
theorem of Boolean algebra.
i) Associative law ii) Demorgan's law for Validity
iii) Distributive law
5. Simplify the following Boolean function to minimum no. of literals.
i) xy+xy1 ii) (x+y) (x+y1) iii)
xyz+x1y+xyz1 iv) y(wz1+wz)+xy v) (A+B)1
((A1+B1)1
6. Reduce the Boolean Expression to required number of literal.
i) BC+AC1+AB+BCD ii) [(CD1) + A ]1+A+CD+AB
iii) [(A+C+D) (A+C+D1) (A+C1+D) (A+B1)
7. Obtain Truth table for function F=xy+xy1+y1z.
8. Convert the following to other canonical form.
i) F(x,y,z) = (1,3,7) ii) F(A,B,C,D)=
(0,2,6,11,13,14) iii) F(x,y,z)= (0,1,2,3,4,6,12)
9. Show that dual of Exclusive-OR is equal to its complement.
10. Expand the following function into canonical SOP form f(x1,x2,x3)
= x1x3 + x2x3 +
x1x2x3
11. Expand the following function into canonical POS form F(W,X,Q)
=(Q+W1) (X+Q1)
(W+X+Q) (W1+X1)
12. Mention different methods of simplifying Boolean functions.
13. Discuss K-map & Quine McCluskey methods
for simplification of Boolean expressions.
14. Define term Dont care condition.
15. Explain K-map representation in detail & discuss the merits &
demerits.

0 comments:

Post a Comment