Computer Architecture Two mark Question bank with answer

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Please find the two mark questions bank with answers below for Computer Architecture subject related to computer science engineering (CSE) branch. Computer Architecture question bank with answer. Please do cross refer it before using it. These is for the Anna University syllabus - regulation 2008. Please feel free to share you feedback and comments so that i can improve this blog.

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1. What are the basic functional units of a computer?
Ans: A computer consists of five functionally independent main parts namely
-Input Unit
-Memory Unit
-Arithmetic and logic Unit
-Output Unit
-Control Unit

2. Define RAM.
Ans: Memory in which any location can be reached in a short and fixed amount of
time after specifying its address is called random access memory.

3. Define memory access time.
Ans: The time required to access one word is called memory access time.

4. What is instruction register (IR) and program counter (PC) used for ?
Ans: The instruction register (IR) holds the instruction that is currently being
executed .Its output is available to the control circuits which generate the timing
signals that control the various processing elements.
The program counter PC) is used to keep track of the execution of the program. It
contains the memory address of the next instruction to be fetched and executed.

5. What do you mean by memory address register(MAR) and memory data
register(MDR)?
The MAR holds the address of the location to be accessed. The MDR contains

6. What is an interrupt?
Ans: An interrupt is a request from an I/O device for service by the processor. The
processor provides the requested service by executing an appropriate interrupt service routine.

7. Explain about Bus.
Ans: Bus is a group of lines that serves as a connecting path for several devices. In addition to the lines that carry the data , the bus must have the lines for address and control purposes.

8. What do you mean by multiprogramming or multitasking?
Ans: The operating system manages the concurrent execution of several application programs to make best possible use of computer resources. This pattern of concurrent execution is called multiprogramming or multitasking.

9. Give the basic performance equation.
Ans: The basic performance equation is given as
T = N ? S/ R
T = It is the processor time required to execute a program
N= It is the actual number of instruction executions.
S = It is the average number of basic steps neede to execute one machine instruction.
R = It is the clock rate.

10. Explain the concept of pipelining.
Ans: Pipelining is the means of executing machine instructions concurrently. It is the effective way of organizing concurrent activity in a computer system. It is a process of substantial improvement in the performance by overlapping the execution of successive instructions.

11. What are the two techniques used to increase the clock rate R?
Ans: The two techniques used to increase the clock rate R are:
1. The integrated – circuit (IC) technology can be increased which reduces the time needed to complete a basic step.
2. We can reduce the amount of processing done in one basic step.

12. What is Big – Endian and Little- Endian representations.
Ans: The Big- endian is used when lower byte addresses are used for the more significant bytes (The leftmost bytes) of the word. The little-endian is used for the opposite ordering, where the lower byte addresses
are used for the less significant bytes ( the rightmost bytes) of the word.

13. What is addressing mode?

14. What are the different types of addressing modes available?
Ans: The different types of addressing modes available are:
-Immediate addressing mode
-Register addressing mode
-Direct or absolute addressing mode
-Indirect addressing mode
-Indexed addressing mode
-Relative addressing mode
-Auto increment
-Auto decrement





15. What is indirect addressing mode?
Ans: The effective address of the operand is the contents of a register or memory ocation whose address appears in the instruction

16. What is indexed addressing mode?
Ans: The effective address of the operand is generated by adding a constant value to the contents of a register.

17. Define autoincrement mode of addressing?
Ans: The effective address of the operand is the contents of a register specified in the instruction. After accessing the operand, the contents of this register are automatically incremented to point to the next item in the list.

18. Define autodecrement mode of addressing?
Ans: The contents of a register specified in the instruction are first automatically decremented and are then used as the effective address of the operand.

19. What are condition code flags? What are the commonly used flags?
Ans:The processor has to keep track of the information about the results of various operations for the subsequent conditional branch instructions. This is done by recording required information in individual bits called condition code flags.
Four commonly used flags are:
-N( Negative )
-Z(Zero)
-V(overflow)
-C(Carry)

20. What do you mean by assembler directives?
Ans: These are the instructions which direct the program to be executed. They have no binary equivalent so they are called pseudo-opcodes. These instructions are used to define symbols, allocate space for variable, generate fixed tables etc. Examples : END, NAME

22. What do you man by relative addressing mode?
Ans: The effective address is determined by the index mode using the program counter in place of the general purpose register Ri.
23. What is Stack?
Ans: A stack is a list of data elements, usually words or bytes with the accessing restriction that elements can be added or removed at one end of the list only. It follows last in first out (LIFO) mechanism.

24. What is a queue?
Ans: Is a type of datastructure in which the data are stored in and retrieved on a First in first out(FIFO) basis. It grows in the direction of increasing addresses in the memory. New data are added at the back (High-address end) and retrieved from the front (low-address end) of the queue.

25. What are the difference between Stack and Queue?
STACK
One end of stack is fixed ( the bottom)
while the other end rises and falls as data
are pushed and popped
Single Pointer is needed to point to the top
of the stack
QUEUE
Both ends of a queue move to higher
addresses
Two pointers are needed to keep track of
the two ends of the queue











1. What is half adder?
Ans: A half adder is a logic circuit with two inputs and two outputs, which adds two
bits at a time, producing a sum and a carry.

2. What is full adder?
Ans: A full adder is logic circuit with three inputs and two outputs, which adds
three bits at a time giving a sum and a carry.

3. What is signed binary?
Ans: A system in which the leading bit represents the sign and the remaining bits
the magnitude of the number is called signed binary. This is also known as sign magnitude.

4. What are the two approaches used to reduce delay in adders?
Ans:1) The first approach is to use the fastest possible electronic technology in

5. What is a carry look-ahead adder?
Ans: The input carry needed by a stage is directly computed from carry signals obtained from all the preceding stages i-1,i-2,…..0, rather than waiting for normal carries to supply slowly from stage to stage. An adder that uses this principle is a called carry look-ahead adder.

6. What are the main features of Booth’s algorithm?
Ans:
1) It handles both positive and negative multipliers uniformly.
2) It achieves some efficiency in the number of addition required when the multiplier has a few large blocks of 1s.

7. How can we speed up the multiplication process?
Ans: There are two techniques to speed up the multiplication process:
1) The first technique guarantees that the maximum number of summands that must be added is n/2 for n-bit operands.
2) The second technique reduces the time needed to add the summands.

8. What is bit pair recoding? Give an example.
Ans: Bit pair recoding halves the maximum number of summands. Group the Booth-recoded multiplier bits in pairs and observe the following: The pair (+1 -1) is equivalent to to the pair (0 +1). That is instead of adding -1 times the multiplicand m at shift position i to +1 ? M at position i+1, the same result is obtained by adding +1 ? M at position i. Eg: 11010 – Bit Pair recoding value is 0 -1 -2

9. What are the two methods of achieving the 2’s complement?
a. Take the 1’s complement of the number and add 1.
b. Leave all least significant 0’s and the first unchanged and then complement the remaining bits.

10. What is the advantage of using Booth algorithm?
Ans: 1) It handles both positive and negative multiplier uniformly.
2) It achieves efficiency in the number of additions required when the multiplier has a few large blocks of 1’s.
3) The speed gained by skipping 1’s depends on the data.

11. Write the algorithm for restoring division.
Ans: Do the following for n times:
1) Shift A and Q left one binary position.
2) Subtract M and A and place the answer back in A.
3) If the sign of A is 1, set q0 to 0 and add M back to A.
Where A- Accumulator, M- Divisor, Q- Dividend.
Step 1: Do the following for n times:
1) If the sign of A is 0 , shift A and Q left one bit position and subtract M from A; otherwise , shift A and Q left and add M to A.
2) Now, if the sign of A is 0,set q0 to 1;otherwise , set q0 to0.
Step 2: if the sign of A is 1, add M to A.

13. Give the IEEE standard for floating point numbers for single precision number.
Ans:
S E? M
Sign of the Number 8-bit signed 23- bit Mantissa fraction exponent in excess-127
0 – Positive representations
1 - Negative value represented= ? 1. M? 2E-127

15. When can you say that a number is normalized?
Ans: When the decimal point is placed to the right of the first (nonzero) significant digit, the number is said to be normalized.

17. Write the Add/subtract rule for floating point numbers.
Ans: 1) Choose the number with the smaller exponent and shift its mantissa right a number of steps equal to the difference in exponents.
2) Set the exponent of the result equal to the larger exponent.
3) Perform addition/subtraction on the mantissa and determine the sign of the result
4) Normalize the resulting value, if necessary.

18. Write the multiply rule for floating point numbers.
Ans:1) Add the exponent and subtract 127.
2) Multiply the mantissa and determine the sign of the result .
3) Normalize the resulting value , if necessary.

19. What is guard bit?
Ans: Although the mantissa of initial operands is limited to 24 bits, it is important to retain extra bits, called as guard bits.

20. What are the ways to truncate the guard bits?
Ans: There are several ways to truncate the guard bits:
1) Chooping
2) Von Neumann rounding
3) Rounding

21. Define carry save addition(CSA) process.
Ans: Instead of letting the carries ripple along the rows, they can be saved and introduced into the next roe at the correct weighted position. Delay in CSA is less than delay through the ripple carry adder.

22. What are generate and propagate function?
Ans: The generate function is given by
Gi=xiyi and
The propagate function is given as
Pi=xi+yi.

23. What is excess-127 format?
Ans: Instead of the signed exponent E, the value actually stored in the exponent field is and unsigned integer E?
Ans: In some cases, the binary point is variable and is automatically adjusted as computation proceeds. In such case, the binary point is said to float and the numbers are called floating point numbers.

25. In floating point numbers when so you say that an underflow or overflow has occurred?
Ans: In single precision numbers when an exponent is less than -126 then we say that an underflow has occurred. In single precision numbers when an exponent is less than +127 then we say that an overflow has occurred.

UNIT III- BASIC PROCESSING UNIT

1. What are the basic steps required to execute an instruction by the processor?
Ans: The basic steps required to execute an instruction by the processor are:
1) Fetch the contents of the memory location pointed to by the PC. They are loaded into the IR.
IR?[[PC]]
2) Assuming that the memory is byte addressable, increment the contents of the PC by 4, that is
PC?[PC} + 4
3) Carry out the action specified by the instruction in the IR.

2. Define datapath in the processor unit.
Ans: The registers , The ALU and the interconnecting bus are collectively referred to as the data path.

3. What is processor clock?
Ans: All operations and data transfers within the processor take place within time periods defined by the processor clock .

4. Write down the control sequence for Move (R1), R2.
Ans: The control sequence is :
R1out, MARin,Read
MDRoutE,WMFC
MDRout,R2in

5.Define register file .
Ans: A set of general purpose registers are called as register file Each register from register file R0 is individually addressable.
6. Draw the hardware organization of two-stage pipeline?
Inter stage buffer

7.What is the role of cache memory in pipeline?
Ans: The use of cache memory is to solve the memory access problem. When cache is included in the processor the access time to the cache is usually the same time needed to perform other basic operation inside the processor.

8.Name the methods for generating the control signals.
Ans: The methods for generating the control signals are:
1) Hardwired control
2) Microprogrammed control

9. Define hardwired control.
Ans: Hard-wired control can be defined as sequential logic circuit that generates specific sequences of control signal in response to externally supplied instruction.

10. Define microprogrammed control.
Ans: A microprogrammed control unit is built around a storage unit is called a control store where all the control signals are stored in a program like format. The control store stores a set of microprograms designed to implement the behavior of the given instruction set.

11. Differentiate Microprogrammed control from hardwired control.
Microprogrammed control
It is the microprogram in control store that
generates control signals.
Speed of operation is low, because it involves
memory access.
Changes in control behavior can be
implemented easily by modifying the
microinstruction in the control store.
Hardwired control
It is the sequential circuit that
generates control signals.
Speed of operation is high.
Changes in control unit behavior can
be implemented only by redesigning
the entire unit.

12. Define parallelism in microinstruction.
Ans: The ability to represent maximum number of micro operations in a single
microinstruction is called parallelism in microinstruction.

16. What are the major characteristics of a pipeline?
Ans: The major characteristics of a pipeline are:
a) Pipelining cannot be implemented on a single task, as it works by splitting multiple
tasks into a number of subtasks and operating on them simultaneously.
b) The speedup or efficiency achieved by suing a pipeline depends on the number of
pipe stages and the number of available tasks that can be subdivided.
c) If the task that can be subdivided has uneven length of execution times, then the
speedup of the pipeline is reduced.
d) Though the pipeline architecture does not reduce the time of execution of a single
task, it reduces the overall time taken for the entire job to get completed.

17. What is a pipeline hazard?
Ans: Any condition that causes the pipeline to stall is called hazard. They are also
called as stalls or bubbles.

17. What are the types of pipeline hazards?
Ans: The various pipeline hazards are:
1. Data hazard
2. Structural Hazard
3. Control Hazard.

18. What is data hazard?
Ans: Any condition in which either the source or the destination operands of an
instruction are not available at the time expected in the pipeline is called data hazard.

19. What is Instruction or control hazard?
Ans: The pipeline may be stalled because of a delay in the availability of an instruction.
For example, this may be a result of a miss in the cache, requiring the instruction to be
fetched from the main memory. Such hazards are often called control hazards or
instruction hazard.

20. Define structural hazards.
access to memory.

21. What is side effect?
Ans: When a location other than one explicitly named in an instruction as a destination
operand is affected, the instruction is said to have a side effect.

22. What do you mean by branch penalty?
Ans: The time lost as a result of a branch instruction is often referred to as branch penalty.

23. What is branch folding?
Ans: When the instruction fetch unit executes the branch instruction concurrently with
the execution of the other instruction, then this technique is called branch folding.

24. What do you mean by delayed branching?
Ans: Delayed branching is used to minimize the penalty incurred as a result of
conditional branch instruction. The location following the branch instruction is called
delay slot. The instructions in the delay slots are always fetched and they are arranged
such that they are fully executed whether or not branch is taken. That is branching
takes place one instruction later than where the branch instruction appears in the
instruction sequence in the memory hence the name delayed branching.

25. What are the two types of branch prediction techniques available?
Ans: The two types of branch prediction techniques are
1) Static branch prediction
2) Dynamic branch prediction

UNIT IV - MEMORY SYSTEM

1. Define Memory Access Time?
Ans: It is the time taken by the memory to supply the contents of a location, from the
time, it receives “READ”.

2. Define memory cycle time.
Ans: It is defined as the minimum time delay required between the initaiation of two
successive memory operations.

3. What is RAM?
This storage location can be accessed in any order and access time is independent of the
location being accessed

4. What is cache memory?

5. Explain virtual memory.
Ans: The data is to be stored in physical memory locations that have addresses different
from those specified by the program. The memory control circuitry translates the
address specified by the program into an address that can be used to access the physical
memory.

6. List the various semiconductors RAMs?
i] Static RAM.
ii] Dynamic RAM

7. What do you mean by static memories?
Ans: Memories that consist of circuits capable of retaining their state as long as power
is applied are known as static memories.

8. Define DRAM’s.
Ans: Atatic Rams are fast but their cost is high so we use dynamic RAMs which do not
retain their state indefinitely but here the information are stored in the form of charge on a capacitor

9. Define DDR SDRAM.
The double data rate SDRAMs are the faster version of SDRAM. It transfers data on both edges of the clock.

10. What is ROM?
ROM is by definition Non Volatile Preprogrammed with information permanently encoded in the chip.

11. What is the mapping procedures adopted in the organization of a Cache Memory?
i) Associative mapping.
ii) Direct mapping.
iii) Set-associative mapping

12. Give the format for main memory address using direct mapping f unction for
4096 blocks in main memory and 128 blocks in cache with 16 blocks per cache.

15. Define Hit and Miss?
The performance of cache memory is frequently measured in terms of a quantity called hit ratio. When the CPU refers to memory and finds the word in cache, it is said to produce a hit. If the word is not found in cache, then it is in main memory and it counts as a miss.

16. Write the formula for the average access time experienced by the processor in a system with two levels of caches.
Ans: The formula for the average access time experienced by the processor in a system with two levels of caches is
tave= h1C1+(1-h1)h2C2+(1-h1)(1-h2)M
h1= hit rate in the L1 cache.
h2= hit rate in the L2 cache.
C1=time to access information in the L1 cache.
C2= time to access information in the L1 cache.
M= time to access information in the main memory.

17. What are the enhancements used in the memory management?
Ans: 1) Write Buffer
2) Pre fetching
3) Look- up Cache.

18. What do you mean by memory management unit?
Ans: The memory management unit is a hardware unit which translates virtual
addresses into physical addresses in the virtual memory techniques.

19. Explain main (primary) memory.
Ans: This memory stores programs and data that are active in use. Storage locations in
main memory are addressed directly by the CPU’s load and store instructions.

20. What do you mean by seek time?
Ans: It is the time required to move the read/write head in the proper track.

22. What is RAID?
Ans: High performance devices tend to be expensive. So we can achieve very high
performance at a reasonable cost by using a number of low-cost devices oerating in
parallel. This is called RAID( Redundant array of Inexpensive Disks).
23. Define data stripping?
Ans: A single large file is stored in several separate disk units by breaking the file up into a number of smaller pieces and storing these pieces on different disks. This is called data stripping.

24. How the data is organized in the disk?
Ans: Each surface is divided into concentric tracks and each track is divided into sectors. The set of corresponding tracks on all surfaces of a stack of disks forms a logical cylinder. The data are accessed by using read/write head.

25. Define latency time.
Ans: This is the amount of time that elapses after the head is positioned over the correct track until the starting position of the addressed sector passes under the read/write head.

UNIT V- I/O ORGANIZATION

1. Why IO devices cannot be directly be connected to the system bus?
Ans: The IO devices cannot be directly connected to the system bus because
i. The data transfer rate of IO devices is slower that of CPU.
ii. The IO devices in computer system has different data formats and work lengths that of CPU
So it is necessary to use a module between system bus and IO device called IO module or IO system

2. What are the major functions of IO system?
Ans: i. Interface to the CPU and memory through the system bus.
ii. Interface to one or more IO devices by tailored data link.

3. What is an I/O Interface?
Ans: Input-output interface provides a method for transferring binary information
between internal storage, such as memory and CPU registers, and external I/O devices

4. Write the factors considered in designing an I/O subsystem?
Ans:
1. Data Location: Device selection, address of data with in device( track, sector etc)
2. Data transfer: Amount, rate to or from device.
3. Synchronization: Output only when device is ready
4. Memory or between an I/O device and CPU.

5. Explain Direct Memory Access.
Ans: A modest increase in hardware enables an IO device to transfer a block of information to or from memory without CPU intervention. This task requires the IO device to generate memory addresses and transfer data through the bus using interface controllers.

6. Define DMA controller.
Ans: The I/O device interface control circuit that is used for direct memory access is
known as DMA controller.

7. What is polling?
Ans: Polling is a scheme or an algorithm to identify the devices interrupting the processor. Polling is employed when multiple devices interrupt the processor through one interrupt pin of the processor.

8. What is the need of interrupt controller?
Ans: The interrupt controller is employed to expand the interrupt inputs. It can handle
the interrupt requests from various devices and allow one by one to the processor.

9. What is a Priority Interrupt?
Ans: A priority interrupt is an interrupt that establishes a priority over the various sources to determine which condition is to be serviced first when two or more requests arrive simultaneously.

10. Define bus.
Ans: When a word of data is transferred between units, all the bits are transferred in parallel over a set of lines called bus. In addition to the lines that carry the data, the bus must have lines for address and control purposes.

11. Define synchronous bus.
Ans: Synchronous buses are the ones in which each item is transferred during a time
slot(clock cycle) known to both the source and destination units. Synchronization can
be achieved by connecting both units to a common clock source.

12. Define asynchronous bus.
Ans: Asynchronous buses are the ones in which each item being transferred is
accompanied by a control signal that indicates its presence to the destination unit. The
destination can respond with another control signal to acknowledge receipt of the items.

13. What do you mean by memory mapped I/O?
Ans: In Memory mapped I/O, there is no specific input or output instructions. The
CPU can manipulate I/O data residing in interface registers with the same instructions
that are used to manipulate memory words i.e. the same set of instructions are used for

14. What is program-controlled I/O?
Ans: In program controlled I/O the processor repeatedly checks a status flags to achieve
the required synchronization between the processor and an input and output device.

15. Define interrupt.
Ans: An interrupt is any exceptional event that causes a CPUU to temporarily transfer control from its current program to another program , an interrupt handler that services the event in question.

16. Define exception.
Ans: The term exception is used to refer to any event that causes an interruption

17. What are the different methods used for handling the situation when multiple interrupts occurs?
Ans: 1) Vectores interrupts
2) Interrupt nesting
3) Simultaneous Requests.

18. What is a privileged instruction?
Ans: To protect the operating system of a computer from being corrupted by user programs, certain instructions can be executed only while the processor is in the supervisor mode. These are called privileged instruction.

19. What is bus arbitration?
Ans: it is process by which the next device to become the bus master is selected and bus
mastership is transferred to it. There are two ways for doing this:
1. Centralized arbitration
2. Distributed arbitration.

20. What is port? What are the types of port available?
Ans: An I/O interface consists of circuitry required to connect an I/O device to
computer bus. One side consists of a data path with its associated controls to transfer
data between the interface and I/O device. This is called port. It is classified into:
1) Parallel port
2) Serial port.

21. What is a parallel port?
Ans: A parallel port transfers data in the form a number of bits, typically 8 to 16, simultaneously to or from the device.

22. What is a serial port?
Ans: A serial port transfers and receives data one bit at a time.

23. What is PCI bus?
Ans: The Peripheral component interconnect(PCI) bus is a standard that supports the any particular processor.

24. What is SCSI?
Ans: It is the acronym for small computer system interface. It refers to a standard bus defined ANSI. Devices such as disks are connected to a computer via 50-wire cable, which can be upto 25 meters in length and can transfer data at rate up to 55 megabytes/s.

25. Define USB.
Ans: The Universal Serial Bus(USB) is an industry standard developed to provide two speed of operation called low-speed and full-speed. They provide simple, low cost and easy to use interconnection system.


1.What is cache memory?
The small and fast RAM units are called as caches.when the execution of an
instruction calls for data located in the main memory,the data are fetched and a copy is
placed in the cache.Later if the same data is required it is read directly from the cache.

2. What is the function of ALU?
Most of the computer operations(arithmetic and logic) are performed in ALU. The data required for the operation is brought by the processor and the operation is performed by the ALU.

3. What is the function of CU?
The control unit acts as the nerve center,that coordinates all the computer operations. It issues timing signals that governs the data transfer.

4. What are basic operations of a computer?
The basic operations are READ and WRITE.
5. What are the registers generally contained in the processor?
MAR-Memory Address Register
MDR-Memory Data Register
IR-Instruction Register
R0-Rn-General purpose Registers
PC-Program Counter

6. What are the steps in executing a program?
1.Fetch
2.Decode
3.Execute
4.Store

7. Define interrupt and ISR?
An interrupt is a request from an I/O device for service by the processor. The
processor provides the requested service by executing the interrupt service routine.

8. Define Bus?
A group of lines that serves as a connecting path for several devices is called a bus.

9. What is the use of buffer register?
The buffer register is used to avoid speed mismatch between the I/O device and the processor.

10. Compare single bus structure and multiple bus structure?
A system that contains only one bus(i.e only one transfer at a time) is called as a single bus structure. A system is called as multiple bus structure if it contains multiple buses.

11. What is System Software? Give an example?
It is a collection of programs that are executed as needed to perform functions such as
-Receiving and interpreting user commands
 -Entering and editing application programs and storing them as files in secondary storage devices. Ex: Assembler, Linker, Compiler etc

12.What is Application Software? Give an example?
Application programs are usually written in a high- level programming language, in which the programmer specifies mathematical or text-processing operations. These operations are described in a format that is independent of the particular computer used to execute the program.
Ex: C, C++, JAVA

13. What is a compiler?
A system software program called a compiler translates the high- level language program into a suitable machine language program containing instructions such as the Add and Load instructions.

14. What is text editor?
It is used for entering and editing application programs. The user of this program interactively executes command that allow statements of a source program entered at a keyboard to be accumulated in a file.

15. Discuss about OS as system software?
OS is a large program,or actually a collection of routines,that is used to control individual application programs.

16. What is multiprogrraming or multitasking?
The operating system manages the concurrent execution of several application
programs to make the best possible uses of computer resources.this pattern of
concurrent execution is called multiprogrraming or multitasking.

17.What is elapsed time of computer system?
The total time to execute the total program is called elapsed time.it is affected by
the speed of the processor,the disk and the printer.

18. What is processor time of a program?
The periods during which the processor is active is called processor time of a programIt depends on the hardware involved in the execution of individual machine instructions.

19. Define clock rate?
The clock rate is given by,
R=1/P,where P is the length of one clock cycle.

20. Write down the basic performance equation?
T=N*S/R
T=processor time
N=no of instructions
S=no of steps
R=clock rate
21.What is pipelining?
The overlapping of execution of successive instructions is called pipelining.

22. What is byte addressable memory?
The assignment of successive addresses to successive byte locations in the memory is called byte addressable memory.

23. What is big endian and little endian format?
The name big endian is used when lower byte addresses are used for the more significiant of the word.The name little endian is used for the less significiant bytes of the word.

24. What is a branch instruction?
Branch instruction is a type of instruction which loads a new value into the program counter.

25. What is branch target?
As a result of branch instructions , the processor fetches and executes

26.What are condition code flags?
The processor keep track of information about the results of various operations for use by subsequent conditional branch instructions. This is accomplished by recording the required information in individual bits, often called condition code flags.

27.Define addressing mode.
The different ways in which the location of an operand is specified in an instruction are referred to as addressing modes.

28.Define various addressing modes.
The various addressing modes are
1.Absolute addressing mode
2.Register addressing mode
3.Indirect addressing mode
4.Index addressing mode
5.Immediate addressing mode
6.Relative addressing mode
7.Auto increment addressing mode
8.Auto decrement addressing mode

29.What is a pointer?
The register or memory location that contains the address of an operand is called a pointer.

30.What is index register?
In index mode the effective address of the operand is generated by adding a constant value to the contents of a register. The register used may be either a special register or may be any one of a set of general purpose registers in the processor. This register is referred to as an index register.

31.What is assembly language?
A complete set of symbolic names and rules for the use of machines constitute a programming language, generally referred to as an assembly language.

32.What is assembler directive?
SUM EQU 200
Assembler directives are not instructions that will be executed .It simply informs the assembler that the name SUM should be replaced by the value 200 wherever it appears in the program, such statements are called as assembler directives.

33.What is loader ?
Loader is a system software which contains a set of utility programs. It will load the object program to the memory.

34.Define device interface.
The buffer registers DATAIN and DATAOUT and the status flags SIN and SOUT are part of circuitry commonly known as a device interface.

UNIT II

4.What are the 2 ways to detect overflow in an n-bit adder?
Overflow can occur when the signs of two operands are the same. Overflow occurs when the carry bits Cn and Cn-1 are different.

5.What is the delay encountered for Cn-1, Sn-1 and Cn in the FA for a single stage
Cn-1 – 2(n-1)
Sn-1 – 2(n-1)+1
Cn – 2n

6.What is the delay encountered for all the sum bits in n-bit binary addition/subtraction
logic unit?
The gate delays with and without overflow logic are 2n+2 and 2n respectively
7.Write down the basic generate and propagate functions for stage i
Gi = XiYi, Pi=Xi xor with Yi

8.Write down the general expression for Ci+1 using first level generate and propagate
function
Ci+1 = Gi+PiGi-1+PiPi-1Gi-2+…+PiPi-1…P1G0+PiPi-1…P0G0
9.What are the two approaches to reduce delay in adders
§ Fastest electronic technology in implementing the ripple carry logic design
§ Augmented logic gate network

10.What is the delay encountered in the path in an n x n array multiplier
The delay encountered in the path in an n x n array multiplier is 6(n-1)-1

11.What is skipping over of one’s in Booth decoding?
The Transformation 011… 110= +100…0 – 10 is called skipping over one’s.In his
case multiplier has its ones grouped into a few contiguous blocks.

12.What are the two attractive features of Booth algorithm
§ It handles both positive and negative multipliers uniformly
§ It achieves some efficiency in the number of additions required when the
multiplier has a few large blocks of ones

13. Give an example for the worst case of Booth algorithm
The worst case is shown as below
0 1 0 1 0 1 0 1 0
+1 -1 +1 -1 +1 -1 +1 -1 +1
In the worst case each bit of the multiplier selects the summands. This results in more
number of summands.

14. What are the two techniques for speeding up the multiplication operation?
§ Bit Pair recoding
§ CSA

15. How bit pair recoding of multiplier speeds up the multiplication process?
It guarantees that the maximum number of summands that must be added is n/2 for n-
bit operands.

16. How CSA speeds up multiplication?
It reduces the time needed to add the summands. Instead of letting the carries ripple
along the rows, they can be saved and introduced into the next row, at the correct
waited position.

17. Write down the levels of CSA steps needed to reduce k commands to two vectorsin CSA
The number of levels can be shown by 1.7log2k-1.7

18. Write down the steps for restoring division and non-restoring division
Non Restoring:
Step1: Do the following n times
1.If the sign of A is 0, shift A and Q left one bit position and subtract M
from A otherwise shift A and Q left and add M to A.
2.Now if the sign of A is 0, set Q0 to 1; otherwise set Q0 to 0
Step 2: If the sign of A is 1, add M to A
Restoring:
§ Shift A and Q left one binary position
§ Subtract M from A
§ If the sign of A is one , set Q0 to 0, add M back to A otherwise set Q0 to 1
18.What is the advantage of non restoring over restoring division?
Non restoring division avoids the need for restoring the contents of register after an successful subtraction.

19.What is the need for adding binary 8 value to the true exponential in floating point numbers?
This solves the problem of negative exponent.Due to this the magnitude of the
numbers can be compared.The excess- x representation for exponents enables efficient
comparison of the relative sizes of the two floating point numbers.

20.Briefly explain the floating point representation with an example?
The floating point representation has 3 fields
1.sign bit
2.significiant bits
3.exponent
For example consider 1.11101100110 x 10^5,
Mantissa=11101100110
Sign=0
Exponent=5

21.What are the 2 IEEE standards for floating point numbers?
1.single
2.double

22.What is overflow,underflow case in single precision(sp)?
Underflow-In SP it means that the normalized representation requires an exponent
less than -126.
greater than +127.

23.What are the exceptions encountered for FP operation?
The exceptions encountered for FP operation are overflow, underflow,/0,inexact
and invalid values.

24.What is guard bits?
Guard bits are extra bits which are produced during the intermediate steps to yield
maximum accuracy in the final results.

25.What are the ways to truncate guard bits?
1.Chopping
2.Von Neumann rounding
3.Rounding procedure

11) What are the two approaches used for generating the control signals in proper sequence?
Hardwired control
Microprogrammed control

12) What are the factors determine the control signals?
1.Contents of the control step counter
2.Contents of the instruction register
3.Contents of the condition code flags
4.External input signals, such as MFC and interrupt requests

13) Explain hardwired control.
The control hardwire can be viewed as a state machine that changes from one state to another in every clock cycle, depending on the contents of the instruction register, the condition codes, and the external inputs. The outputs of the state machine are the control signals. The
sequence of operations carried out by this machine is determined by the wiring of the logic elements, hence the name “hardwired”.

14) What are the features of the hardwired control.
A controller that uses this approach can operate at high speed. It has little flexibility and the complexity of the instruction set it can implement is limited.

16) What is control word?
A control word is a word whose individual bits represent the various control signals.

17) Define microroutine and micro instruction.
A sequence of control words corresponding to the control sequence of a machine instruction constitutes the microroutine for that instruction, and the individual control words in this microroutine are referred to as microinstructions.

18) What is control store?
The micro routines for all instructions in the instruction set of a computer are stored in a special memory called the control store.
19) What is the drawback of assigning one bit position to each control signal?
Assigning individual bits to each control signal results in long microinstructions because the number of required signals is usually large. Moreover, only a few bits are set to 1in any given microinstruction, which means the available bit space is poorly used.

20) Name some register output control signals.
Pcout, MDRout, Zout, Offsetout, R0out, R1out, R2out, R3out, and TEMP out

21) What is vertical organization and horizontal organization?
Highly encoded schemes that use compact codes to specify only a small number of control functions in each microinstruction are referred to as a vertical organization. On the other hand, the minimally encoded scheme in which many resources can be controlled with a single
microinstruction is called a horizontal organization.

22) Compare vertical organization and horizontal organization.

Vertical organization
1. Highly encoded schemes
2. Specify only a small
number of control signals.
3. Operating speed is high.
Horizontal organization
Minimally encoded schemes
Many resources can be controlled.
Operating speed is low.

23) Explain bit-O-Ring technique.

24) What is the drawback of microprogrammed control?
It leads to a slower operating speed because of the time it takes to fetch microinstructions from the control store.

25) Define emulation.
Given a computer with a certain instruction set, it is possible to define additional machine instructions and implement them with extra microroutines. Emulation allows us to replace obsolete equipment with
more up to date machines. If the replacement computer fully emulates the original one, then no software changes have to be made to run existing programs. Thus, emulation facilitates transitions to new computer systems
with minimal disruption.

26) Define pipelining.
Pipelining is an effective way of organizing concurrent activity in a computer system. The processor executes the program by fetching and executing instructions, one after the other.

27) Name the four steps in pipelining.
Fetch: read the instruction from the memory.
Decode: decode the instruction and fetch the source operand.
Execute: perform the operation specified by the instruction.
Write: store the result in the destination location.

28) What is the use of cache memory?
The use of cache memories solves the memory access problem. In particular, when a cache is included on the same chip as the processor, access time to the cache is usually the same as the time needed to perform other basic operations inside the processor. This makes it possible to stages, and the clock period is chosen to correspond to the longest one.

29) What is data hazard?
Any condition that causes the pipeline to stall is called a hazard. A data hazard is any condition in which either the source or the destination operands of an instruction are not available at the time expected in the pipeline. As a result some operation has to be delayed, and the pipeline stalls.

30) What are instruction hazards?
The pipeline may also be stalled because of a delay in the availability of an instruction. For example, this may be a result of a miss in the cache, requiring the instruction to e fetched from the main memory.
Such hazards are often called control hazards or instruction hazards.

31) What are called stalls?
An alternative representation of the operation of a pipeline in the case of a cache miss gives the function performed by each pipeline stage in each clock cycle. The periods in which the decode unit, execute unit, and the write unit are idle are called stalls. They are also referred to as bubbles in the pipeline.

32) What is structural hazard?
Structural hazard is the situation when two instructions require the use of a given hardware resource at the same time. The most common case in which this hazard may arise is in access to memory.

33) What is said to be side effect?
When a location other than one explicitly named in an instruction as a destination operand is affected, the instruction is said to have a side effect.

34) What is dispatch unit?
A separate unit which we call the dispatch unit, takes instructions from the front of the queue and sends them to the execution unit. The dispatch unit also performs the decoding function.

35) What is branch folding/
The instruction fetch unit has executed the branch instruction concurrently with the execution of other instructions. This technique is referred to as branch folding.

36) What is delayed branching?
instructions in the delay slots are always fetched. Therefore, we would like to arrange for them to be fully executed whether or not the branch is taken. The objective is to be able to place useful instructions in these slots. If no
useful instructions can be placed in the delay slots, these slots must be filled with NOP instructions.

37) Define speculative execution.
Speculative execution means that instructions are executed before the processor is certain that they are in the correct execution sequence. Hence, care must be taken that no processor registers or memory locations
are updated until it is confirmed that these instructions should indeed be executed. If the branch decision indicates otherwise, the instructions and all their associated data in the execution units must be purged , and the
correct instructions fetched and executed.

38) What is called static and dynamic branch prediction?
The branch prediction decision is always the same every time a
given instruction is executed. Any approach that has this characteristic is
called static branch prediction. Another approach in which the prediction
decision may change depending on execution history is called dynamic
branch prediction.

39) What are condition codes?
In many processors, the condition code flags are stored in the
processor status register. They are either set or cleared by many
instructions, so that they can be tested by subsequent conditional branch
instructions to change the flow of program execution.

40) What are superscalar processors?
Several instructions start execution in the same clock cycle, and
the processor is said to use multiple issue. Such processors are capable of
achieving an instruction execution throughput of more than one instruction
per cycle. They are known as superscalar processors.

41) What is imprecise and precise exception?
Situation in which one or more of the succeeding instructions have
been executed to completion is called imprecise exception. Situation in
which all subsequent instructions that may have been partially executed
are discarded. This is called a precise exception.

42) What is commitment unit?
When out-of-order execution is allowed, a special control unit is
needed to guarantee in-order commitment. This is called the commitment
unit.

43) What is a deadlock/
A deadlock is a situation that can arise when two units, A and B, use a shared resource. Suppose that unit B cannot complete its task until unit A completes its task. At the same time, unit B has been assigned a resource that unit A needs. If this happens, neither unit can complete its task. Unit A is waiting for the resource it needs, which is being held by unit b. at the same time, unit B is waiting for unit A to finish before it can release that resource.

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